The present invention relates generally to circuit analysis, and more specifically relates to a system and method for non-contact detection of electric and magnetic fields generated by a circuit and interpreting the detected fields to analyze the circuit.
The testing and analysis of circuits, circuits boards and the like is a complex and a costly step in the manufacture of these devices. Moreover, the complexity and the cost of circuit test and analysis continues to rise as circuits are made smaller. The rise in complexity and cost of testing and analysis is attributable, at least in part, to the tester interfaces used to contact circuits for passing electrical test signals to the circuits and receiving response signals therefrom. Traditional tester interfaces include bed-of-nails interfaces, sockets, probe cards and the like. As the pitch of circuit interface contacts (e.g., contact pads, bonding pads, solder balls, solder mounds, leads, and the like) enter the sub-millimeter range, the micron range, and the sub-micron range, the pitch of adjacent tester contacts on tester interfaces similarly enter these ranges. The cost associated with the manufacture of such tester interfaces and the maintenance fees therefore, rise to relatively high levels yielding testing and analysis costly.
Testing and analysis of circuits and circuits boards is costly due not only to the relatively high cost for development and use of tester interfaces, but also because each unique circuit and/or unique circuit board is generally associated with a dedicated tester interface. Circuits and circuit boards that are manufactured in relatively low numbers present further testing problems in that the cost of a unique tester interface for such circuits can become relatively high for cost-effect testing. Further, circuits and circuit boards that were not designed for test, such as relatively older circuit boards, present additional unique testing problems, such as not being able to thoroughly test these boards because, for example, combinations of node that should be contacted for a thorough test may not be able to be contacted simultaneously. These older circuit boards might also be tested in relatively low numbers also raise cost-effective testing concerns.
Further, contact testing and analysis techniques often fail to expose flaws that lead to relatively early failure (often referred to as circuit infant mortality) of circuits and circuits boards. For example, contact testing is often of limited use to detect flaws in metal lines (e.g., cracks, missing material, etc), transistors (e.g., charge accumulation and associated uneven heating) and the like that often lead to relatively high infant mortality. Flaws that lead to high infant mortality are often detected through destructive techniques that ultimately render devices unsuitable for their intended use. Contact testing also provides limited testing for prognostic analysis of voltage, current, and circuit frequency of discrete internal components.
Therefore, new apparatus and methods are needed that provide for limited or no physical contact with circuits and circuit boards under test, have a relatively low dedication to specific circuits and/or circuits boards tested, and are configured to non-destructively detect flaws in the circuits and/or circuit boards.